Develop A Fast Flash Translation Layer by Exploiting Block-Level I/O Correlation




Abstract: To mask the unique erase-before-write feature of NAND flash, the Flash Translation Layer (FTL) in SSD redirects the incoming writes to a free physical address and manages a logical to physical address mapping table. However, they induces significant performance degradation to SSD. To overcome this limitation, we propose Correlation- Aware Page-level FTL, a.k.a CPFTL, which exploits semantic links between pages by analysis the workloads.

Bio: Jian Zhou is currently a PhD student in Computer Engineering at University of Central Florida. His research interests include data management in memory subsystem, NAND flash SSD and emerging non-volatile memory technologies. His current focus is on developing new data analysis engine under persist memory systems.