Leveraging Nonvolatile Memory in High-Level Synthesis for Accelerator-rich Architecture




Abstract: In order to meet the urgent, accelerator-rich architecture with normally-off mode is widely applied. The memory becomes the major concern, because it cannot be powered-off for data retention, which leads to the natural idea of leveraging NVMs for the hardware accelerator design to achieve further power reduction. This paper presents the first framework optimizes NVM allocation in high-level synthesis, optimizing the loop transformation, buffer allocation minimizing the power consumption.

Bio: Shuangchen Li received is B.S. and M.S. degree from Tsinghua University. He is currently a PhD student in UC, Santa Barbara. His adviser is Dr. Yuan Xie.