Incremental Error Recovery for Endurance and Energy Improvements in Non-Volatile Memories

Abstract: Incremental error recovery (IER) is a technique to simultaneously extend the lifetime and lower the energy/latency of MLC/TLC NVMs. IER partitions NVM rows into segments that remain in the partially mapped mode until a cell failure within a segment. IER restores only the failed segment to the full binary mapping, while other segments continue to operate in the partially mapped mode. For less than 2% memory overhead, IER not only reduces memory energy/latency, but also enhances its lifetime.

Bio: Shivam Swami is a PhD student in the ECE department of the University of Pittsburgh. He is currently working on architecture design for emerging non volatile memories (PCM/RRAM). He completed his master's in 2014 from the Indian Institute of Technology Kharagpur, where his work focused upon 'application mapping' for thermal aware 3-D network-on-chip.