Architecting Low Power Crossbar-Based Memristive RAM




Abstract: We propose a 3D memory architecture for resistive crossbar arrays based on the CMOL concept (a crossbar-like architecture) that is structurally simple, highly flexible and fully exploits the benefits of CMOL. To validate its feasibility, an electrical model of the system is constructed and used to estimate its delay, power and energy consumption. Our results show that such memories can achieve high read/write concurrency with energy consumptions that are significantly lower than that of DRAM.

Bio: Miguel Lastras received his B.S. and M.S. in Engineering Physics and Applied Sciences from the Universidad Autonoma de San Luis Potosi, Mexico. He received in 2012 a M.S. degree in Computer Engineering from the University of California, Santa Barbara where he is currently a PhD student. Among others, his interests include the architectural development and organization of novel resistive crossbar-based memories and its use in 3D-IC systems.