Exploiting Variation within MLC NAND to Improve Post ECC reliability

Abstract: The shared page architecture of MLC NAND gives rise to significant variation in the raw bit error rate of pages within the block not present in SLC technologies. If exploited correctly, this variation can improve ECC performance rather than hinder it. I present a simple algorithm which uses the variation in raw bit error rate to optimally improve the ECC performance of a standard approach and demonstrate its improvement on P/E cycle endurance and data retention performance.

Bio: Oliver Hambrey is from Worcestershire, England. Since January 2010 he has been a research engineer for Siglead Europe Ltd, part of the Siglead Group. He obtained his undergraduate degree in mathematics from the University of Warwick in 2007 and his MSc in Complexity Science from the University of Warwick in 2009. He is currently writing up his PhD thesis on error correction codes for modern data storage.